Radio receivers in general have problems receiving radio signals containing data. These problems include undesired AC level variations and DC offsets contained within the received data signals. Several sources of the offsets cause the problem. Namely, part tolerances, undesired offsets in the incoming signals, temperature variations and aging of parts.
In particular, digital radio receivers containing diversity are sensitive to undesired offsets in received data signals, because the offsets cause errors in the recovered data. Additionally, diversity receivers in a Rayleigh fading environment typically switch between receivers at a rate between 0 and 100 Hz. This switching rate requires a signal compensation apparatus that adapts quickly to changing conditions. Thus, digital radio receivers containing diversity require a dynamic signal compensator to remove the undesired AC level variations and DC offsets.
Several solutions are available for controlling undesired AC level variations and DC offset in a radio receiver. Namely, manually tuning the receiver before sale of the radio, manual tuning plus temperature compensation circuit, tight control of part tolerances, or a dynamic feedback control loop. These solutions all exist today, but they fall short of the stringent requirements of a digital radio receiver having diversity receivers.
First, the receiver's undesired offsets may be controlled by manually tuning the radio in the factory. This allows the AC level variations and DC offsets inherent to the radio to be tuned out for one temperature setting. This solution does not consider the AC level variations and DC offsets contained in the received signal, nor the changes in the AC level variations and DC offset over time and temperature. For some radio systems these variations are negligible. However, in a digital radio receiver containing diversity a tight control of the AC level variations and the DC offset is necessary for proper operation. Thus, the manual tune solution is insufficient.
Second, a temperature compensation circuit may be added to the manual tune to control the undesired AC level variations and DC offset over temperature variations during operation. Again, this solution will be affected by variances due to part aging and the AC level variations and DC offsets contained in the received data signals. Additionally, the temperature compensation circuit will add variation to the compensation apparatus by part tolerances and aging. Thus, this solution is inadequate.
Third, the part tolerances during the manufacturing process may be tightly controlled such that the specification and variances over time and temperature are limited. However, this becomes prohibitively expensive and does not compensate for variances in the received data signal. Again, this solution would not be sufficient for a digital radio receiver containing diversity.
Fourth, a first order feedback control loop may be added in the received data signals path. This control loop is simply implemented. The received data signal is input into a data slicer. The data slicer determines the most likely symbol the data signal is representing. The data slicer outputs one value from a choice of predetermined values. The control loop creates an error signal having a DC level equal to the difference between the received data signal DC level and the DC level of the data slicer output signal. The error signal is first order filtered and fed back into the received signal path before entering the symbol slicer. This control loop forces the input signal to lock onto one of the predetermined symbol signal levels. This control loop is free from part tolerance, temperature variance, aging and inherent DC offset limitations as previously discussed. However, problems arise when the error signal is larger than the difference between two predetermined symbol decision levels. When this occurs, the loop can falsely lock on an incorrect symbol causing substantial performance errors. In some systems the DC offset never exceeds or rarely exceeds, this limitation, thus, false locking is not a problem. However, in a quadrature phase shift keying (QPSK) modulated system the DC offset may easily exceed these thresholds and cause false locking. Frequent false locking will degrade the performance of the radio receiver.
Therefore, a need exists for a signal compensation apparatus in a radio receiver which can quickly compensate for the AC level variations and DC offsets inherent in a radio system without false locking.